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This book provides a unified overview of network-on-chip router
micro-architecture, the corresponding design opportunities and
challenges, and existing solutions to overcome these challenges.
The discussion focuses on the heart of a NoC, the NoC router, and
how it interacts with the rest of the system. Coverage includes
both basic and advanced design techniques that cover the entire
router design space including router organization, flow control,
pipelined operation, buffering architectures, as well as
allocators' structure and algorithms. Router micro-architectural
options are presented in a step-by-step manner beginning from the
basic design principles. Even highly sophisticated design
alternatives are categorized and broken down to simpler pieces that
can be understood easily and analyzed. This book is an invaluable
reference for system, architecture, circuit, and EDA researchers
and developers, who are interested in understanding the overall
picture of NoC routers' architecture, the associated design
challenges, and the available solutions.
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